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1 of 22 optimum technology matching? applied gaas hbt ingap hbt gaas mesfet sige bicmos si bicmos sige hbt gaas phemt si cmos si bjt gan hemt functional block diagram rf micro devices?, rfmd?, optimum technology matching?, enabling wireless connectivity?, powerstar?, polaris? total radio? and ultimateblue? are trademarks of rfmd, llc. bluetooth is a trade- mark owned by bluetooth sig, inc., u.s.a. and licensed for use by rfmd. all other trade names, trademarks and registered tradem arks are the property of their respective owners. ?2012, rf micro devices, inc. product description 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . bifet hbt ldmos ? synth phase det. ref. divider rffc2071a synth phase det. ref. divider rffc2072a rffc2071a/2a 2.7ghz rf synthesizer/vco with integrated rf mixer the rffc2071a and rffc2072a are re-confi gurable frequency conversion devices with integrated fractional-n phased locked loop (pll) synthesizer, voltage controlled oscillator (vco) and either one or two high linearity mixers. the fractional-n synthe- sizer takes advantage of an advanced sigma-delta modulator that delivers ultra-fine step sizes and low spurious products. th e vco features temperature compensation circuits that deliver stable performance across the operating temperature range of -40c to +85c. the pll/vco engine combin ed with an external loop filter allows the user to generate local oscillator (lo) signals from 85mhz to 2700mhz. the lo signal is buffered and routed to the integrated rf mixers which are used to up/down-convert frequencies ranging from 30mhz to 2700mhz. the mixer bias cur- rent is programmable and can be reduce d for applications requiring lower power consumption. both devices can be configured to work as signal sources by bypass- ing the integrated mixers. device programming is achieved via a simple 3-wire serial interface. in addition, a unique programming mode allows up to four devices to be controlled from a common serial bus. this eliminates the need for separate chip- select control lines between each device an d the host controller. up to six general purpose outputs are provided, which can be used to access internal signals (the lock signal, for example) or to control front end components. both devices operate with a 2.7v to 3.3v power supply. features ? 85mhz to 2700mhz lo frequency range ? fractional-n synthesizer with very low spurious levels ? typical step size 1.5hz ? fully integrated low phase noise vco and lo buffers ? integrated phase noise 0.18rms at 1ghz ? high linearity rf mixer(s) ? 30mhz to 2700mhz mixer frequency range ? input ip3 +23dbm ? mixer bias adjustable for low power operation ? full duplex mode (rffc2071a) ? 2.7v to 3.3v power supply ? low current consumption ? 3- or 4-wire serial interface applications ? catv head-ends ? digital tv repeaters ? multi-dwelling units ? diversity receivers ? software defined radios ? frequency band shifters ? point-to-point radios ? cellular repeaters ? wimax/lte infrastructure ? cellular jammers ? satellite communications ? vhf/uhf radios ds140110 package: qfn, 32-pin, 5mm x 5mm
2 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . absolute maximum ratings parameter rating unit supply voltage (v dd ) -0.5 to +3.6 v input voltage (v in ) any pin -0.3 to v dd + 0.3 v rf/if mixer input power +15 dbm operating temperature range -40 to +85 c thermal resistance (r th )32c/w operating junction temperature 125 c storage temperature range -65 to +150 c parameter specification unit condition min. typ. max. esd requirements human body model 2000 v dc pins 1500 v all pins charge device model 500 v all pins operating conditions supply voltage (v dd ) 2.7 3.0 3.3 v temperature (t op ) -40 +85 c logic inputs/outputs ( v dd = supply to dig_vdd pin) input low voltage -0.3 +0.5 v input high voltage v dd / 1.5 v dd v input low current -10 +10 ? ainput = 0v input high current -10 +10 ? ainput = v dd output low voltage 0 0.2*v dd v output high voltage 0.8*v dd v dd v load resistance 10 k ? load capacitance 20 pf gpo drive capability sink current 20 ma at v ol = 0.6v source current 20 ma at v ol = 2.4v output impedance 25 ? static supply current (i dd ) with 1ghz lo 106 ma low current, mix_idd=1, one mixer enabled. 132 ma high linearity, mix_idd=6, one mixer enabled. standby 2 ma reference oscillator and bandgap only. power down current 300 ? a enbl=0 and ref_stby=0 mixer 1/2 (mixer output driving 4:1 balun) gain -2 db not including balun losses noise figure 10 db low current setting 13 db high linearity setting iip3 +10 dbm low current setting +23 dbm high linearity setting input port frequency range 30 2700 mhz mixer input return loss 10 db 100 ? differential output port frequency range 30 2700 mhz caution! esd sensitive device. exceeding any one or a combination of the absolute maximum rating conditions may cause permanent damage to the device. ex tended application of absolute maximum rating conditions to the device may reduce device reliability. specified typical perfor- mance or functional operation of the device under absolute maximum rating condi- tions is not implied. the information in this publication is believed to be accurate and reliable. however, no responsibility is assumed by rf micro device s, inc. ("rfmd") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. no license is granted by implication or otherwise under any patent or patent rights of rfmd. rfmd reserves the right to change component circuitry, recommended appli- cation circuitry and specifications at any time without prior notice. rfmd green: rohs compliant per eu directive 2002/95/ec, halogen free per iec 61249-2-21, < 1000ppm each of antimony trioxide in polymeric materials and red phosphorus as a flame retardant, and <2% antimony in solder.
3 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . parameter specification unit condition min. typ. max. reference oscillator external reference frequency 10 104 mhz reference divider ratio 1 7 external reference input level 500 800 1500 mvp-p ac-coupled synthesizer (loop bandwidth of 200khz, 52mhz reference) synthesizer output frequency 85 2700 mhz phase detector frequency 52 mhz phase noise (lo = 1ghz) -108 dbc/hz 10khz offset -107 dbc/hz 100khz offset -135 dbc/hz 1mhz offset 0.18 rms integrated from 1khz to 40mhz phase noise (lo = 2ghz) -102 dbc/hz 10khz offset -101 dbc/hz 100khz offset -130 dbc/hz 1mhz offset 0.33 rms integrated from 1khz to 40mhz normalized phase noise floor -214 dbc/hz measured at 20khz to 30khz offset voltage controlled oscillator open loop phase noise at 1mhz offset 2.5ghz lo frequency -133 dbc/hz vco3 2.0ghz lo frequency -134 dbc/hz vco2 1.5ghz lo frequency -136 dbc/hz vco1 open loop phase noise at 10mhz offset 2.5ghz lo frequency -149 dbc/hz vco3 2.0ghz lo frequency -150 dbc/hz vco2 1.5ghz lo frequency -151 dbc/hz vco1 external lo input lo input frequency range 85 5400 mhz note minimum lo divide by 2 at mixer external lo input level 0 dbm driven from 50 ?? source via a 1:1 balun
4 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . note 1: an rc low pass filter could be us ed on this line to reduce digital noise. note 2: if the device is under software control this input can be configured as a general purpose output (gpo). note 3: connect a 51k ? resistor from this pin to ground, this pin is sensitive to low frequency noise injection. note 4: dc voltage should not be applied to this pin. use either an ac-coupling capacitor as part of lumped element matching network or a transformer (see evaluation board schematic). note 5: this pin must be connected to ana_vdd2 using an rf choke or a transformer (see application schematic). pin names and descriptions pin name description 1enbl/gpo5 device enable pin. see note 1 and 2. 2 ext_lo external local oscillator input (see note 4). 3 ext_lo_dec decoupling pin for external local oscillator (see note 4). 4rext external bandgap bias resistor. see note 3. 5 ana_vdd1 analog supply. use good rf decoupling. 6lfilt1 phase detector output. low-frequency noise-sensitive node. 7lfilt2 loop filter op-amp output. low-frequency noise-sensitive node. 8lfilt3 vco control input. low-frequency noise-sensitive node. 9mode/gpo6 mode select pin. see note 1 and 2. 10 ref_in reference input. use ac coupling capacitor. 11 nc 12 tm connect to ground. 13 mix1_ipn differential input 1 (see note 4). on rffc2072 this pin is nc. 14 mix1_ipp differential input 1 (see note 4). on rffc2072 this pin is nc. 15 gpo1/add1 general purpose output / multislice address bit. 16 gpo2/add2 general purpose output / multislice address bit. 17 mix1_opn differential output 1 (see note 5). on rffc2072 this pin is nc. 18 mix1_opp differential output 1 (see note 5). on rffc2072 this pin is nc. 19 dig_vdd digital supply. should be decoupled as close to the pin as possible. 20 nc leave open circuit. 21 nc 22 ana_vdd2 analog supply. use good rf decoupling. 23 mix2_ipp differential input 2 (see note 4). 24 mix2_ipn differential input 2 (see note 4). 25 gpo3/fm general purpose output / frequency control input. 26 gpo4/ld/do general purpose output / lock detect output / serial data out. 27 mix2_opn differential output 2 (see note 5). 28 mix2_opp differential output 2 (see note 5). 29 resetx chip reset (active low). connect to dig_vdd if asynchronous reset is not required. 30 enx serial interface select (active low). see note 1. 31 sclk serial interface clock. see note 1. 32 sdata serial interface data. see note 1. exposed paddle ground reference, should be connected to pcb ground through a low impedance path.
5 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . theory of operation the rffc2071a and rffc2072a are wideband rf frequency converter chips which include a fractional-n synthesizer and a low noise vco core. the rffc2071a has an lo signal multiplexer, two lo buffer circuits, and two rf mixers. the rffc2072a has a single lo buffer circuit and one rf mixer. both devices have an integrated voltage reference and low drop out regulators supplying critical circuit blocks such as the vcos and synthesi zer. synthesizer programming, device configuration and control are achieved through a mixture of hardware and software cont rols. all on-chip registers are programmed through a simple 3- wire serial interface. vco the vco core in the rffc2071a and rffc2072a consists of three vcos which, in conjunction with the integrated lo dividers of /2 to /32, cover the lo range of 85mhz to 2700mhz. each vco has 128 overlapping bands which are used to achieve low vco gain and optimal phase noise performance across the whole tu ning range. the chip automati cally selects the correct vco (vco auto-select) and vco band (vco coarse tuning) to generate the desired lo frequency based on the values programmed into the pll1 and pll2 registers banks. the vco auto-select and vco coarse tuning are triggered every time enbl is taken high, or if the pll re-lock self clearing bit is programmed high. once the correct vco and band have been sele cted the pll will lock onto the correct frequency. during the band selection process, fixed capacitance elements are progressively connected to the vco resonant circuit until the vco is oscillating approximately at the correct frequency. the output of this band selection, ct_cal, is made available in the read- back register. a value of 127 or 0 in this register indicates th at the coarse tuning was unsucce ssful, and this will also be in di- cated by the ct_failed flag also availabl e in the read-back register. a ct_cal value between 1 and 126 indicates a success- ful calibration, the actual value being dependent on the desired frequency as well as process variation for a particular device . the band select process will center the vco tuning voltage at about 0.8v, compensating for manufacturing tolerances and pro- cess variation as well as environmental factors including temperature. the vcos have temperature compensation circuitry so the pll will hold lock over the entire op erating temperature range of -40c to +85c. this is true regardless of whatever tem- perature the vco band select process is performed. the vco tuni ng gain is also held stable across temperature, maintaining consistent loop bandwidth and synthesizer phase noise. the rffc2071a and rffc2072a feature a differential lo input to allow the mixer to be driven from an external lo source. the fractional-n pll can be used wi th an external vco driven into this lo input, which may be useful to reduce phase noise in some applications. this may also require an external op-amp, dependant on the tuning voltage required by the external vco. in the rffc2071a the lo signal is routed to mixer 1, mixer 2, or both mixers depending on the state of the mode pin (or mode bit if under software control) and the value of the fulld bit. se tting fulld high puts the device into full duplex mode and bot h mixers are enabled. fractional-n pll the rffc2071a and rffc2072a contain a charge pump-based frac tional-n phase locked loop (pll) for controlling the three vcos. the pll includes automati c calibration systems to counteract the effe cts of process and envi ronmental variations, ensuring repeatable loop response and phase noise performance. as well as the vco auto-select and coarse tuning, there is a loop filter calibration mechanism which can be enabled if required. this operates by adjusting the charge pump current to maintain loop bandwidth. this can be useful for applications where the lo is tuned over a wide frequency range. the pll has been designed to use a reference frequency of between 10mhz and 104mhz from an external source, which is typically a temperature controlled crystal oscillator (tcxo). a re ference divider (divide by 1 to divide by 7) is supplied and should be programmed to limit the frequency at the phase detector to a maximum of 52mhz. two pll programming banks are provided, the first bank is preceded by the label pll1 and the second bank is preceded by the label pll2. for the rffc2071a these banks are used to program mixer 1 and mixer 2 respectively, and are selected automati- cally as the mixer is selected using mode. for the rffc20 72a mixer 2 and register bank pll2 are normally used.
6 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . the vco outputs are first divided down in a high frequency presca lar. the output of this high frequency prescalar then enters the n divider, which is a fractional divider containing a dual-modulus prescaler and a digitally spur-compensated fractional sequence generator. this allows very fine frequency steps and minimizes fractional sp urs. the fractional energy is randomized and appears as fractional noise at frequency offsets above 100khz which will be attenuated by the loop filter. an external loop filter is used, giving flexibility in setting loop bandwi dth for optimizing phase noise and lock time, for example. the synthesizer step size is ty pically 1.5hz when using a 26mhz reference freque ncy. the exact step size for any reference and lo frequency can be calculated using the following formula: (f ref * p) / (r * 2 24 * lo_div) where f ref is the reference frequency, r is the reference division rati o, p is the prescalar division ratio, and lo_div is the lo divider value. pin 26 (gpo4) can be configured as a lock detect pin. the lock status is also available in the read-back register. the lock det ect function is a window detector on the vco tuning voltage. the lock flag will be high to show pll lock which corresponds to the vco tuning voltage being within the specified range, typically 0.30v to 1.25v. the lock time of the pll will depend on a number of factors; including the loop bandwidth and the reference frequency at the phase detector. this clock frequency determ ines the speed at which the state machin e and internal calibrations run. a 52mhz phase detector frequency will give fastest lock times, of typically <50 ? secs when using the pll re-lock bit. phase detector and charge pump the phase detector provides a current output to drive an actve loop filter. the charge pump output current is set by the value contained in the p1_cp_def and p2_cp_def fields in the loop filter configuration register. the charge pump current is given by approximately 3 ? a/bit, and the fields are 6 bits long . this gives default value (31) of 93 ? a and maximum value (63) of 189 ? a. if the automatic loop bandwidth calibration is enabled the char ge pump current is set by the calibration algorithm based upon the vco gain. the phase detector will operate with a maximum input frequency of 52mhz. loop filter the active loop filter is implemented using the on-chip low noise op-amp, with external resistors and capacitors. the op-amp gives a tuning voltage range of typically +0. 1v to +2.4v. the internal configuration of the chip is shown below with the recom- mended active loop filter. the loop filter shown is designed to give lowest integrat ed phase noise, for reference frequencies o f between 26mhz and 52mhz. the external loop filter components gi ve the flexibility to optimize the loop response for any par- ticular application and combination of reference and vco frequencies. lfilt1 8p2 180p 22k 470r 470r 330p 330p lfilt2 lfilt3 +1.1v
7 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . external reference the rffc2071a and rffc2072a have been designed to use an external reference such as a tcxo. the typical input will be a 0.8vp-p clipped sine wave, which should be ac-coupled into the reference input. when the pll is not in use, it may be desir- able to turn off the internal reference circuits, by setting the refstby bit low, to minimize current draw while in standby mod e. on cold start, or if refstby is programmed low, the reference circuits will need a warm-up period. this is set by the su_wait bits. this will allow the clock to be stable and immediately avai lable when the enbl bit is asserted high, allowing the pll to assume normal operation. if the current consumption of the reference circuits in standby mode, typically 2ma, is not critical, then the refstby bit can be set high. this allows the fastest startup and lock time after enbl is taken high. wideband mixer the mixers are wideband, double-balanced gilbert cells. they support rf/if freq uencies from 30mhz up to 2700mhz. each mixer has an input port and an output port that can be used for either if or rf (in other words, for up- or down-conversion). t he mixer current can be programmed to betw een about 15ma and 45ma depending on line arity requirements. the majority of the mixer current is sourced through the output pins via either a ce nter-tapped balun or an rf choke in the external matching cir- cuitry to the supply. the rf mixer input and output ports are differential and require baluns and simple matching circ uits optimized to the specific application frequencies. a conversion gain of approximatel y -2db (not including balun losses) is achieved with 100 ? differen- tial input impedance, and the outputs driving 200 ? differential load impedance. increasing the mixer output load increases the conversion gain. the mixer has a broadband common gate input. the input impe dance is dominated by the resistance set by the mixer 1/gm term, which is inversely proportional to the mixer cu rrent setting. the resistance will be approximately 85 ? at the default mixer current setting (100). there is also some shunt capacitance at the mixer input, and the inductance of the bond wires (about 0.5nh on each pin) to consider at higher frequencies. the fo llowing diagram is a simple model of the mixer input impedance: the mixer output is high impedance, consisting of approximately 2k ? resistance in parallel with some capacitance, approxi- mately 1pf. the mixer output does not require a conjugate matching network. it is a constant current output which will drive a real differential load of between 50 ? and 500 ? , typically 200 ? . since the mixer output is a constant current source, a higher resistance load will give higher output voltage and gain. a shunt inductor can be used to resonate with the mixer output capac- itance at the frequency of interest. this inductor may not be required at lower frequencies where the impedance of the output capacitance is less significant. at higher output frequencies the inductance of the bond wires (about 0.5nh on each pin) becomes more significant. the following diagram is a simple model of the mixer output: rffc207x mixer input 0.5nh 0.5nh rin typ 85 ? 0.5pf rffc207x mixer output 0.5nh 0.5nh 1k ? 1pf 1k ?
8 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . the rffc2071a mixer layout and pin placement has been optimized for high mixer-to-mixer isolation of greater than 60db. the mixers can be set up to operate in half duplex mode (1 mixer active) or full duplex mode (both mixers active). this selection i s done via control of mode and by setting the fulld bit. when in full duplex mode, either pll register bank can be used, the lo signal is routed to both mixers. serial interface all on-chip registers in the rffc2071a an d rffc2072a are programmed using a propri etary 3-wire serial bus which supports both write and read operations. synthesizer programming, device configuration, and control are achieved through a mixture of hardware and software controls. certain functions and operations require the use of hardware controls via the enbl, mode, and resetb pins in addition to programming via the serial bus. alternatively there is the option to control the chip completely via the serial bus. the serial data interface can be configured for 4-wire operation by setting the 4wir e bit in the sdi_ctrl register high. then pin 26 is used as the data out pin, and pin 32 is the serial data in pin. mode fulld active pll register bank active mixer low 0 1 1 high 0 2 2 low 1 1 1 and 2 high 1 2 1 and 2
9 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . hardware control three hardware control pins are provided: enbl, mode, and resetb. the enbl pin has two functions: to enable the analog circuits in the chip and to trigger the vco auto-selection and coarse tun- ing mechanisms. the vco auto-selection and coarse tuning is in itiated when the enbl pin is taken high. every time the fre- quency of the synthesizer is repr ogrammed, enbl has to be asserted high to initiate these mechanisms and then to initiate the pll locking. alternatively following the programming of a new frequency the pll re-lock self clearing bit could be used. the resetb pin is a hardware reset control that will reset all di gital circuits to their startup state when asserted low. the d evice includes a power-on-reset function, so this pin should not normal ly be required, in which case it should be connected to the positive supply. the mode pin controls which mixer(s) and pll programming register bank is active. serial data interface control the normal mode of operation uses the 3-wire serial data inte rface to program the device registers, and three extra hardware control lines: mode, enbl and resetb. when the device is under software control, achieved by setting the sipin bit in the sdi_ctrl register high, then the hardware can be controlled via the sdi_ctrl register. when this is the case, the three hardware control lines are not required. if the device is under software control, pins 1 and 9 can be configured as general purpose outputs (gpo). multi-slice mode the multi-slice mode of operation allows up to four chips to be controlled from a common seri al bus. the device address pins (15 and 16) add1 and add2 are used to set the address of each part. on power up, and after a reset, the device s ignore the address pins add1 and add2 and any data presented to the serial bus will be programmed into all the devices. however, once the addr bit in the sdi_ctrl register is set, each device then adopts an address according to the state of the address pins on the device. general purpose outputs the general purpose outputs (gpos) can be controlled via the gpo register and will depend on the state of mode since they can be set in different states corresponding to either mixer path 1 or 2. for example, the gpos can be used to drive leds or to control external circuitry such as switches or low power lnas. each gpo pin can supply approximately 20ma load current. the output voltage of the gpo high state will drop with increased current drive by approximately 25mv/ma. similarly the output voltage of the gpo low state will rise with increased current, again by approximately 25mv/ma. slice2 (0) slice2 (1) slice2 (2) slice2 (3) a1 a2 enx sdata sclk vdd vdd vdd vdd a1 a2 a1 a2 a1 a2
10 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . external modulation the rffc2071a and rffc2072a fractional-n synthesizer can be used to modulate the frequency of the vco. there are two dedicated registers, ext_mod and fmod, which can be used to co nfigure the device as a modulator. it is possible to modulate the vco in two ways: 1.binary fsk the modsetup bits in the ext_mod register are set to 11. gpo3 is then configured as an input and used to control the signal frequency. the frequency deviation is set by the modstep and modulation bits in the ext_mo d and fmod registers respec- tively. the modulation frequency is calculated according to the following formula: where modulation is a 2's complement number and f pd is the phase detector frequency. 2.continuous modulation the modsetup bits in the ext_mod register are set to 01. the frequency deviation is set by the modstep and modulation bits in the ext_mod and fmod registers respectively. the vco fr equency is then changed by writing a new value into the mod- ulation bits, the vco frequency is instantly updated. an arbi trary frequency modulation can then be performed dependant only on the rate at which values are written into the fmod register. the modulation frequency is calculated according to the following formula: where modulation is a 2's complement number and f pd is the phase detector frequency. programming information the rffc2071a and rffc2072a share a common serial interface and control block. please refer to the register map and pro- gramming guides which are available for download from http://rfmd.com/products/intsynthmixer/ . evaluation boards evaluation boards for rffc2071a and rffc2072a are provided as part of a design kit, along with the necessary cables and programming software tool to enable full evaluation of the device. the evaluation board has been configured for wideband operation. the mixer inputs and outputs are connected to wideba nd transmission line transfor mer baluns. design kits can be ordered from www.rfmd.com or from local rfmd sales offices and authorized sales channels. for ordering codes please see ?ordering information? on page 22. for furthe r details on how to set up th e design kits please refer to the user guide which can be downloaded from http://rfmd.com/products/intsynthmixer/. f mod 2 modstep f pd modulation ?? 2 16 ? ?? = f mod 2 modstep f pd modulation ?? 2 16 ? ?? =
11 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . detailed functional block diagram pre- scaler mux /2 n [n=1..5] n divider sequence generator phase detector reference divider charge pump gpo control biasing & ldos lock flag xo ext lo 51k +3v mode enbl reset enx sdata sclk rfxf8553 4:1 balun +3v op1 rfxf8553 4:1 balun +3v op2 rfxf9503 1:1 balun ip2 rfxf9503 1:1 balun ip1 loop filter 3-wire serial bus control lines mixer 2 mixer 1 rffc2071a only
12 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . rffc2071a pin out rffc2072a pin out 1 2 3 4 5 6 7 8 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 24 23 22 21 20 19 18 17 exposed paddle enbl/gpo5 ext_lo ext_lo_dec rext ana_vdd1 lfilt1 lfilt2 lfilt3 gpo2/add2 gpo1/add1 tm nc ref_in mode/gpo6 gpo3/fm gpo4/ld/do mix2_opn mix2_opp resetx enx sclk sdata mix2_ipn mix2_ipp ana_vdd2 nc nc dig_vdd mix1_opp mix1_opn mix1_ipp mix1_ipn 1 2 3 4 5 6 7 8 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 24 23 22 21 20 19 18 17 exposed paddle enbl/gpo5 ext_lo ext_lo_dec rext ana_vdd1 lfilt1 lfilt2 lfilt3 gpo2/add2 gpo1/add1 tm nc ref_in mode/gpo6 gpo3/fm gpo4/ld/do mix_opn mix_opp resetx enx sclk sdata mix_ipn mix_ipp ana_vdd2 nc nc dig_vdd nc nc nc nc
13 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . application schematic 51k r1 33pf c1 33pf c2 33pf c3 33pf c5 vdda2 vddd 8.2pf c8 180pf c9 330pf c10 22k r3 470r r2 vdda2 vdda2 100pf c20 100pf c21 100pf c23 100pf c24 100pf c26 100pf c27 100pf c28 100pf c29 100pf c30 1 2 j1 rf_op2 1 2 j2 rf_ip2 1 2 j3 rf_op1 1 2 j4 rf_ip1 vdda1 33pf c13 33pf c14 33pf c15 1nf c16 330pf c17 470r r6 100pf c6 rf_op2_p rf_op2_n rf_ip2_p rf_ip2_n rf_op1_n rf_op1_p rf_op1 rf_ip2 rf_op2 rf_ip1_n rf_ip1_p 10nf c19 10nf c18 4 3 6 1 2 t2 rfxf9503 4 3 6 1 2 t3 rfxf8553 4 3 6 1 2 t4 rfxf9503 4 3 6 1 2 t1 rfxf8553 50 ohm 50 ohm 50 ohm 50 ohm rf_ip1 10nf c34 33pf c36 33pf c35 lfilt3 lfilt3 lfilt1 lfilt1 lfilt2 lfilt2 loop filter 470r r9 gpio2 gpio1 gpio4 gpio3 220r r25 enbl sdata sclk enx resetx mode xtalp 10 enbl 1 ext_lo 2 ext_lo_dec 3 rext 4 ana_vdd1 5 lfilt1 6 lfilt2 7 lfilt3 8 mode 9 xtaln 11 gpio1 15 tm 12 mix1_io1n 13 mix1_io1p 14 gpio2 16 ana_vdd2 22 mix1_if_io2n 17 mix1_if_io2p 18 dig_vdd 19 nc 20 nc 21 resetx 29 mix2_if_io2p 23 mix2_if_io2n 24 gpio3 25 gpio4 26 mix2_io1p 27 mix2_io1n 28 sdata 32 enx 30 sclk 31 gnd 33 u1 rffc2071a_2072a 10nf c44 120r r31 470r r32 vdda2 10nf c43 d1 green lock detect led vc 1 out 3 gnd 2 vcc 4 u2 vctcxo +2.8v vdda2 rffc2071a only
14 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . typical synthesizer performance characteristics v dd = +3v and t a = +27c unless stated. measured on rffc2071a/rffc2072a evaluation board with active loop filter. -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise 4000mhz vco frequency, 52mhz crystal oscillator 2000mhz 1000mhz 500mhz 250mhz 125mhz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise 4000mhz vco frequency, 26mhz crystal oscillator 2000mhz 1000mhz 500mhz 250mhz 125mhz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise 3000mhz vco frequency, 52mhz crystal oscillator 1500mhz 750mhz 375mhz 187.5mhz 93.75mhz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise 3000mhz vco frequency, 26mhz crystal oscillator 1500mhz 750mhz 375mhz 187.5mhz 93.75mhz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise 5200mhz vco frequency, 26mhz crystal oscillator 2600mhz 1300mhz 650mhz 325mhz 162.5mhz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise 5200mhz vco frequency, 52mhz crystal oscillator 2600mhz 1300mhz 650mhz 325mhz 162.5mhz
15 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . typical synthesizer performance characteristics v dd = +3v and t a = +27c unless stated. measured on rffc2071a/rffc2072a evaluation board. -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1.0 10.0 100.0 1000.0 10000.0 100000.0 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise vs temperature 2000mhz lo frequency, 26mhz tcxo -40 deg c +25 deg c +85 deg c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 500 1000 1500 2000 2500 3000 rms integrated phase noise (degrees) lo frequency (mhz) synthesiser rms integrated phase noise integration bandwidth 1khz to 40mhz 26mhz tcxo 52mhz tcxo -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1.0 10.0 100.0 1000.0 10000.0 100000.0 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise vs temperature 2600mhz lo frequency, 26mhz tcxo -40 deg c +25 deg c +85 deg c -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1.0 10.0 100.0 1000.0 10000.0 100000.0 phase noise (dbc/hz) offset frequency (khz) synthesizer phase noise vs temperature 1500mhz lo frequency, 26mhz tcxo -40 deg c +25 deg c +85 deg c note: 26mhz crystal oscillator: ndk ena3523a 52mhz crystal oscillator: ndk ena3560a
16 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . typical vco performance characteristics v dd = +3v and t a = +27c unless stated. measured on rffc2071a/rffc2072a evaluation board. 0 20 40 60 80 100 120 140 0 5 10 15 20 25 30 35 1700 1800 1900 2000 2100 2200 2300 2400 ct_cal word kvco (mhz/v) vco frequency /2 (mhz) vco2 frequency versus kvco & ct_cal lo divide by 2 kvco ct_cal 0 20 40 60 80 100 120 140 0 5 10 15 20 25 30 35 1200 1300 1400 1500 1600 1700 1800 1900 ct_cal word kvco (mhz/v) vco frequency /2 (mhz) vco1 frequency versus kvco & ct_cal lo divide by 2 kvco ct_cal -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 10.0 100.0 1000.0 10000.0 100000.0 phase noise (dbc/hz) offset frequency (khz) vco phase noise with lo divide by 2 2500mhz vco3 2000mhz vco2 1500mhz vco1 0 20 40 60 80 100 120 140 0 5 10 15 20 25 30 35 2200 2300 2400 2500 2600 2700 2800 2900 3000 ct_cal word kvco (mhz/v) vco frequency /2 (mhz) vco3 frequency versus kvco & ct_cal lo divide by 2 kvco ct_cal
17 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . typical rf mixer 2 performance characteristics v dd = +3v and t a = +27c unless stated. measured on rffc2071a/rffc2072a evaluation board. -2.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 1234567 pin 1db (dbm) mixer bias current setting (mix2_idd) mixer 2 input power for 1db compression lo frequency = 1000mhz, if output = 100mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.6v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 500 750 1000 1250 1500 1750 2000 noise figure (db) lo frequency (mhz) mixer 2 noise figure versus frequency if output = 100mhz mix_idd = 1 mix_idd = 2 mix_idd = 3 mix_idd = 4 mix_idd = 5 mix_idd = 6 mix_idd = 7 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 1234567 noise figure (db) mixer bias current setting (mix2_idd) mixer 2 noise figure versus bias current lo frequency = 1000mhz, if output = 100mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v 0.0 5.0 10.0 15.0 20.0 25.0 30.0 1234567 input ip3 (dbm) mixer bias current setting (mix2_idd) mixer 2 input ip3 versus bias current lo frequency = 1000mhz, if output = 100mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.6v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v 0.0 5.0 10.0 15.0 20.0 25.0 30.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 500 750 1000 1250 1500 1750 2000 2250 pin 1db (dbm) iip3 (dbm) rf input frequency (mhz) mixer 2 linearity performance mix_idd = 5, +3.0v, if output = 100mhz input ip3 pin 1db -10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 400 600 800 1000 1200 1400 1600 1800 2000 conversion gain (db) rf input frequency (mhz) conversion gain of mixer 2 if output = 100mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.6v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v
18 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . typical rf mixer 1 performance characteristics v dd = +3v and t a = +27c unless stated. measured on rffc2071a evaluation board. -2.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 1234567 pin 1db (dbm) mixer bias current setting (mix1_idd) mixer 1 input power for 1db compression lo frequency = 1000mhz, if output = 100mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.6v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v 0.0 5.0 10.0 15.0 20.0 25.0 30.0 1234567 input ip3 (dbm) mixer bias current setting (mix1_idd) mixer 1 input ip3 versus bias current lo frequency = 1000mhz, if output = 100mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.6v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 1234567 noise figure (db) mixer bias current setting (mix1_idd) mixer 1 noise figure versus bias current lo frequency = 1000mhz, if output = 100mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.6v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v -10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 400 600 800 1000 1200 1400 1600 1800 2000 conversion gain (db) rf input frequency (mhz) conversion gain of mixer 1 if output = 100mhz 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 500 750 1000 1250 1500 1750 2000 noise figure (db) lo frequency (mhz) mixer 1 noise figure versus frequency if output = 100mhz mix_idd = 1 mix_idd = 2 mix_idd = 3 mix_idd = 4 mix_idd = 5 mix_idd = 6 mix_idd = 7 0.0 5.0 10.0 15.0 20.0 25.0 30.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 500 750 1000 1250 1500 1750 2000 2250 pin 1db (dbm) iip3 (dbm) rf input frequency (mhz) mixer 1 linearity performance mix_idd = 5, +3.0v, if output = 100mhz input ip3 pin 1db -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.6v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.6v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.6v
19 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . typical performance characteristics of both rf mixers v dd = +3v and t a = +27c unless stated. measured on rffc2071a evaluation board. -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 200 400 600 800 1000 1200 1400 1600 1800 2000 lo leakage (dbm) lo frequency (mhz) typical lo leakage at mixer output +3.0v supply voltage path 1, -40 deg c path 1, +27 deg c path 1, +85 deg c path 2, -40 deg c path 2, +27 deg c path 2, +85 deg c -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 400.0 600.0 800.0 1000.0 1200.0 1400.0 1600.0 level at mixer 2 output (dbm) rf input frequency (mhz) lo & rf leakage at mixer 2 output rf input power 0dbm, mix2_idd = 4 if output at 100mhz lo leakage (high side) rf leakage -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 400.0 600.0 800.0 1000.0 1200.0 1400.0 1600.0 level at mixer 1 output (dbm) rf input frequency (mhz) lo & rf leakage at mixer 1 output rf input power 0dbm, mix1_idd = 4 if output at 100mhz lo leakage (high side) rf leakage
20 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . typical full duplex mode performance characteristics v dd = +3v and t a = +27c unless stated. measured on rffc2071a evaluation board. 90.0 100.0 110.0 120.0 130.0 140.0 150.0 1234567 current (ma) mixer bias current setting (mix_idd) total supply current versus mixer bias setting one mixer enabled, lo frequency = 1000mhz -40 deg c, +2.7v -40 deg c, +3.0v -40 deg c, +3.3v +27 deg c, +2.7v +27 deg c, +3.0v +27 deg c, +3.3v +85 deg c, +2.7v +85 deg c, +3.0v +85 deg c, +3.3v 70.0 80.0 90.0 100.0 110.0 120.0 130.0 140.0 150.0 160.0 170.0 0 500 1000 1500 2000 2500 supply current (ma) lo frequency (mhz) total supply current versus lo frequency one mixer enabled, +3.0v supply voltage mix_idd = 1 mix_idd = 2 mix_idd = 3 mix_idd = 4 mix_idd = 5 mix_idd = 6 mix_idd = 7 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0 500 1000 1500 2000 2500 isolation (db) rf input frequency (mhz) mixer to mixer isolation in full duplex mode lo = 915mhz & mix_idd = 4 -40 deg c 25 deg c +85 deg c rff2071a typical operating current in ma in full duplex mode (both mixers enabled) with +3v supply. mix2_idd mix1_idd 1 2 3 4 5 6 7 1 129 134 139 144 149 154 159 2 134 139 144 150 155 160 165 3 139 144 150 155 160 165 170 4 144 150 155 160 165 170 175 5 149 155 160 165 170 175 180 6 154 160 165 170 175 180 185 7 159 164 170 175 180 185 190
21 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . package drawing qfn, 32-pin, 5mm x 5mm
22 of 22 rffc2071a/2a ds140110 7628 thorndike road, greensboro, nc 27409-9421 for sales or technical support, contact rfmd at (+1) 336-678-5570 or customerservice@rfmd.com . ordering information rffc2071a rffc2072a part number description devices/container rffc2071asb 32-pin qfn 5-piece sample bag RFFC2071ASQ 32-pin qfn 25-piece sample bag rffc2071asr 32-pin qfn 100-piece reel rffc2071atr7 32-pin qfn 750-piece reel rffc2071atr13 32-pin qfn 2500-piece reel dkfc2071a complete design kit 1 box part number description devices/container rffc2072asb 32-pin qfn 5-piece sample bag rffc2072asq 32-pin qfn 25-piece sample bag rffc2072asr 32-pin qfn 100-piece reel rffc2072atr7 32-pin qfn 750-piece reel rffc2072atr13 32-pin qfn 2500-piece reel dkfc2072a complete design kit 1 box

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